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2SD405  Selling Leads ,2SD405 Datasheet

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2SD405   Features:

PowtPR -
REGISTERED //tS _:.OUTPUTS
1 ^
CLOCK Iw -+/-

2SD405   (Absolute) Maximum Ratings:

FEATURES
I Precision power supply voltage monitor N 3.OV t0 5.5V operation
- 5V, 3.3V and 3V systemsN Low power CMOS technology
- +5.OV (+1- 5%, +1- 10%)N 64-Byte page write buffer
- +3.3V (+1- 5%, +1- 10%) - +3.OV (+1- 10%) I Active low reset, CAT1320 I Active high reset, CAT1321 I Valid reset guaranteed at Vcc=lV N 1,000,000 Program/Erase cycles N 100 year data retention N 8-pin DIP, SOIC, TSSOP and TDFN packages N Industrial temperature range
1 400kHz I2C bus

2SD405   Pinout:

PARAMETERDESCRIPTION CONDITIONS MIN TYP MAX UNIT
AC PERFORMANCE
dGDifferential Gain Error (Note l)G = 2, RL = 150Q t0 2.5V, RF = 1kC! 0.1 %
dp Differential Phase Error (Note l)G = 2, RL = 150Q t0 2.5V, RF = 1kC! 0.1
BW Bandwidth-3dB, G = 1, RL = 10kCl, RF = 0 100 MHz
-3dB, G = 1, RL = 150Cl, RF = 0 60 MHz
BW1 Bandwidth +O.ldB, G = 1, RL = 1500! to GND, RF = 0 8 MHz
GBWPGain Bandwidth Product 60 MHz
SR Slew Rate G = 1, RL = 150Q to GND, RF = 0, VO = 0.5Vt0 3.5V 150 200 V/lis
tSSettling Timet0 0.1%, VOUT = OV t0 3V 35 ns
DC PERFORMANCE
AVOLOpen Loop Voltage GainRL = no load, VOUT = 0.5V t0 3V 54 65 dB
RL = 1500! to GND, VOUT = 0.5V t0 3V 40 50 dB
VOsOffset VoltageVCM = 1V, SOT23-5 and MSOP packages 25 mV
VCM = 1V, All other packages 15 mV
TcVOs Input Offset Voltage TemperatureCoeicient 10 mV/oC
lB Input Bias CurrentVCM= OV3.5V 2 100 nA
INPUT CHARACTERISTICS
CMIRCommon Mode Input Range CMRR >47dB 0 3 5 V
CMRRCommon Mode Rejection RatioDC, VCM = 0 t0 3.OV 50 60 dB
DC, VCM = 0 t0 3.5V 47 60 dB
RINInput Resistance 1.5 GQ
CINInput Capacitance 1.5 pF
OUTPUT CHARACTERISTICS
VOPPositive Output Voltage SwingRL = 1500! t0 2.5V (Note 2) 4.70 4.85 V
RL = 150Q to GND (Note 2) 4.20 4.65 V
RL = 1kQ t0 2.5V (Note 2) 4.95 4 97 V
VONNegative Output Voltage SwingRL = 150Q t0 2.5V (Note 2) 0.15 0 30 V
RL = 1500! to GND (Note 2) 0 V
RL = 1kQ t0 2.5V (Note 2) 0 03 0 05 V
+IOUTPositive Output CurrentRL = 10c! t0 2.5V 60 90 120 mA
-IOUTNegative Output CurrentRL = 10Q t0 2.5V -50 -65 -80 mA
ENABLE (EL5146 & EL5246 0NLY)

External Timing Parameters EP610-15 EP610-20 Non-Turbo Adder
Symbol Parameter Conditions Min Max Min Max Note (3)Unit
tPDlInput to non-registered output Cl=35 pF 15 20 20 ns
tPD2I/O input to non-registered output C1=35 pF 17 22 20 ns
tPZXInput to output enable Cl=35 pF 15 20 20 ns
tPXZInput to output disableC1 = 5 pF, Note (4) 15 20 20 ns
tCLRAsynchronous output clear time Cl=35 pF 15 20 20 ns
fMAXMaximum clock frequency Note (5)83.3 62.5 O MHz
tsUGlobal clock input setup time 9 11 20 ns
tHGlobal clock input hold time 0 0 0 ns
tCHGlobal clock high time 6 8 0 ns
tCL Global clock low time 6 8 0 ns
tC01Global clock to output delay 11 13 O ns
tCNTGlobal clock minimum period 12 16 0 ns
fCNTMax. internal global clock frequency Note (6)83.3 62.5 0 MHz
tASUArray clock input setup time 6 8 20 ns
tAHArray clock input hold time 6 8 0 ns
tACHArray clock high time 7 9 0 ns
tACLArray clock low time 7 9 O ns
tODHOutput data hold time after clockCl = 35 pF, Note (7) 1 1 1 ns
'AC01Array clock to output delay 15 20 20 ns
tACNTArray clock minimum period 14 18 0 ns
'ACNT Array clock internal maximum frequency Note (6)71.4 55.6 0 MHz

+20% 1.15+0.15C3216X7R2A333M
+10% 1.15+0.15C3216X7R2A473K
47000 +20% 1.15+0.15 C3216X7R2A473M
+10% 1.6+0.2C3216X7R2A683K
68000 +20% 1.6+0.2 C3216X7R2A683M
+10% 1.6+0.2C3216X7R2A104K
100000 +20% 1.6+0.2 C3216X7R2A104M
iannnn +10% 1.6+0.2 C3216X7R2A154K

VOs is affected by PC board layout. Proper layout guidelines should be followed for optimal performanceSee "Layout Considerations."

+10% 1.6+0.2C3225COG2E103K
+5% 2.0+0.2C3225COG2E153J

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2SD405  DataSheet

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  2SD405 Supplier,   2SD405 Trading
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